Impact of ground line position on CMOS interconnect behavior

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Autoren

  • M. Faïez Ktata
  • Uwe Arz
  • Hartmut Grabinski
  • Helmut Fischer

Organisationseinheiten

Externe Organisationen

  • Infineon Technologies AG
  • Physikalisch-Technische Bundesanstalt (PTB)
Forschungs-netzwerk anzeigen

Details

OriginalspracheEnglisch
Titel des Sammelwerks64th ARFTG Microwave Measurements Conference
UntertitelDigital Communications Systems Metrics, ARFTG 2004
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers Inc.
Seiten207-211
Seitenumfang5
ISBN (elektronisch)0780389522, 9780780389526
PublikationsstatusVeröffentlicht - 2004
Veranstaltung64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004 - Orlando, USA / Vereinigte Staaten
Dauer: 2 Dez. 2004 → 3 Dez. 2004

Publikationsreihe

Name64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004

Abstract

In this paper, we investigate the impact of ground line position as well as the effects of conductive substrates with different conductivities of 10 S/m (low), 100 S/m (medium) and 10.000 S/m (high) on on-chip interconnects. Characteristic line parameters obtained from field calculations are validated with two-port network analyzer measurements of specially designed test structures in a frequency range up to 50 GHz.

ASJC Scopus Sachgebiete

Zitieren

Impact of ground line position on CMOS interconnect behavior. / Faïez Ktata, M.; Arz, Uwe; Grabinski, Hartmut et al.
64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004. Institute of Electrical and Electronics Engineers Inc., 2004. S. 207-211 1427600 (64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004).

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Faïez Ktata, M, Arz, U, Grabinski, H & Fischer, H 2004, Impact of ground line position on CMOS interconnect behavior. in 64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004., 1427600, 64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004, Institute of Electrical and Electronics Engineers Inc., S. 207-211, 64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004, Orlando, USA / Vereinigte Staaten, 2 Dez. 2004. https://doi.org/10.1109/ARFTGF.2004.1427600
Faïez Ktata, M., Arz, U., Grabinski, H., & Fischer, H. (2004). Impact of ground line position on CMOS interconnect behavior. In 64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004 (S. 207-211). Artikel 1427600 (64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ARFTGF.2004.1427600
Faïez Ktata M, Arz U, Grabinski H, Fischer H. Impact of ground line position on CMOS interconnect behavior. in 64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004. Institute of Electrical and Electronics Engineers Inc. 2004. S. 207-211. 1427600. (64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004). doi: 10.1109/ARFTGF.2004.1427600
Faïez Ktata, M. ; Arz, Uwe ; Grabinski, Hartmut et al. / Impact of ground line position on CMOS interconnect behavior. 64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004. Institute of Electrical and Electronics Engineers Inc., 2004. S. 207-211 (64th ARFTG Microwave Measurements Conference: Digital Communications Systems Metrics, ARFTG 2004).
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title = "Impact of ground line position on CMOS interconnect behavior",
abstract = "In this paper, we investigate the impact of ground line position as well as the effects of conductive substrates with different conductivities of 10 S/m (low), 100 S/m (medium) and 10.000 S/m (high) on on-chip interconnects. Characteristic line parameters obtained from field calculations are validated with two-port network analyzer measurements of specially designed test structures in a frequency range up to 50 GHz.",
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Download

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AU - Arz, Uwe

AU - Grabinski, Hartmut

AU - Fischer, Helmut

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