High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh Environments

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandBeitrag in Buch/SammelwerkForschungPeer-Review

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OriginalspracheEnglisch
Titel des SammelwerksLecture Notes in Computer Science
UntertitelEmbedded Computer Systems: Architectures, Modeling, and Simulation 23rd International Conference, SAMOS 2023 Samos, Greece, July 2–6, 2023 Proceedings
Herausgeber/-innenCristina Silvano, Marc Reichenbach, Christian Pilato
KapitelOpen Hardware RISC-V Technologies
Seiten255-268
Seitenumfang14
Band23
ISBN (elektronisch)978-3-031-46077-7
PublikationsstatusVeröffentlicht - 2023

Publikationsreihe

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Band14385 LNCS
ISSN (Print)0302-9743
ISSN (elektronisch)1611-3349

Abstract

An increasing number of sensors and actuators are being
used in today’s high-tech drilling tools to further optimise the drilling
process. Each sensor and actuator either generates data that needs to
be processed or requires real-time input control signals. RISC-V proces-
sors are being developed to meet the computational demands of today’s
harsh environment applications. A known bottleneck for processors is
the data flow and instruction input to the processor, especially as mem-
ory response times are particularly high for the state-of-the-art 180 nm
harsh environment silicon-on-insulator (SOI) technology, further limit-
ing the design space. Therefore, this paper presents a high-performance
instruction fetch architecture that achieves a high clock frequency while
preserving high instructions per cycle. We evaluate different approaches
to implementing such a design and propose a design that is able to reach
up to 0.73 instructions per cycle (IPC) and achieve a clock frequency of
229 MHz, which is more than twice as high as previous designs in this
technology. The new architecture achieves 167 million instructions per
second (MIPS), which is four times higher than the rocket chip achieves
when synthesised for the same harsh environment technology.

ASJC Scopus Sachgebiete

Fachgebiet (basierend auf ÖFOS 2012)

  • TECHNISCHE WISSENSCHAFTEN
  • Elektrotechnik, Elektronik, Informationstechnik
  • Elektrotechnik, Elektronik, Informationstechnik
  • Computer Architektur

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High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh Environments. / Hawich, Malte; Rumpeltin, Nico (Mitwirkende*r); Rücker, Malte (Mitwirkende*r) et al.
Lecture Notes in Computer Science: Embedded Computer Systems: Architectures, Modeling, and Simulation 23rd International Conference, SAMOS 2023 Samos, Greece, July 2–6, 2023 Proceedings. Hrsg. / Cristina Silvano; Marc Reichenbach; Christian Pilato. Band 23 2023. S. 255-268 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Band 14385 LNCS).

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandBeitrag in Buch/SammelwerkForschungPeer-Review

Hawich, M, Rumpeltin, N, Rücker, M, Stuckenberg, T & Blume, H 2023, High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh Environments. in C Silvano, M Reichenbach & C Pilato (Hrsg.), Lecture Notes in Computer Science: Embedded Computer Systems: Architectures, Modeling, and Simulation 23rd International Conference, SAMOS 2023 Samos, Greece, July 2–6, 2023 Proceedings. Bd. 23, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Bd. 14385 LNCS, S. 255-268. https://doi.org/10.1007/978-3-031-46077-7_17
Hawich, M., Rumpeltin, N., Rücker, M., Stuckenberg, T., & Blume, H. (2023). High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh Environments. In C. Silvano, M. Reichenbach, & C. Pilato (Hrsg.), Lecture Notes in Computer Science: Embedded Computer Systems: Architectures, Modeling, and Simulation 23rd International Conference, SAMOS 2023 Samos, Greece, July 2–6, 2023 Proceedings (Band 23, S. 255-268). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Band 14385 LNCS). https://doi.org/10.1007/978-3-031-46077-7_17
Hawich M, Rumpeltin N, Rücker M, Stuckenberg T, Blume H. High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh Environments. in Silvano C, Reichenbach M, Pilato C, Hrsg., Lecture Notes in Computer Science: Embedded Computer Systems: Architectures, Modeling, and Simulation 23rd International Conference, SAMOS 2023 Samos, Greece, July 2–6, 2023 Proceedings. Band 23. 2023. S. 255-268. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). Epub 2023 Nov 7. doi: 10.1007/978-3-031-46077-7_17
Hawich, Malte ; Rumpeltin, Nico ; Rücker, Malte et al. / High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh Environments. Lecture Notes in Computer Science: Embedded Computer Systems: Architectures, Modeling, and Simulation 23rd International Conference, SAMOS 2023 Samos, Greece, July 2–6, 2023 Proceedings. Hrsg. / Cristina Silvano ; Marc Reichenbach ; Christian Pilato. Band 23 2023. S. 255-268 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).
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