Hierarchical software locking

Publikation: Schutzrecht/PatentPatent

Erfinder/-innen

  • Jonathan Ross (Erfinder*in)
  • Ronald Aigner (Erfinder*in)
  • Jan S. Rellermeyer (Erfinder*in)
  • Jork Loeser (Erfinder*in)

Externe Organisationen

  • Microsoft Research
Forschungs-netzwerk anzeigen

Details

OriginalspracheEnglisch
Veröffentlichungsnummer (amtliches Aktenzeichen)US8468169B2
IPCG06F9/526
Prioritätsdatum1 Dez. 2010
Anmeldedatum1 Dez. 2010
PublikationsstatusAngenommen/Im Druck - 18 Juni 2013

Abstract

A processor chip may have a built-in hardware lock and deterministic exclusive locking of the hardware lock by execution units executing in parallel on the chip. A set of software locks may be maintained, where the execution units set and release the software locks only by first acquiring a lock of the hardware lock. A first execution unit sets a software lock after acquiring a lock of the hardware lock, and other execution units, even if exclusively locking the hardware lock, are unable to lock the software lock until after the first execution unit has reacquired a lock of the hardware lock and possibly released the software lock while exclusively locking the hardware lock. An execution unit may release a software lock after and while holding a lock of the hardware lock. The hardware lock is released when a software lock has been set or released.

Zitieren

Hierarchical software locking. / Ross, Jonathan (Erfinder*in); Aigner, Ronald (Erfinder*in); Rellermeyer, Jan S. (Erfinder*in) et al.
Patent Nr.: US8468169B2. Juni 18, 2013.

Publikation: Schutzrecht/PatentPatent

Ross J, Aigner R, Rellermeyer JS, Loeser J, Erfinder/-innen. Hierarchical software locking. US8468169B2. 2013 Jun 18.
Ross, Jonathan (Erfinder*in) ; Aigner, Ronald (Erfinder*in) ; Rellermeyer, Jan S. (Erfinder*in) et al. / Hierarchical software locking. Patent Nr.: US8468169B2. Juni 18, 2013.
Download
@misc{baf29d94d86646bcb18b8e202a6c89ae,
title = "Hierarchical software locking",
abstract = "A processor chip may have a built-in hardware lock and deterministic exclusive locking of the hardware lock by execution units executing in parallel on the chip. A set of software locks may be maintained, where the execution units set and release the software locks only by first acquiring a lock of the hardware lock. A first execution unit sets a software lock after acquiring a lock of the hardware lock, and other execution units, even if exclusively locking the hardware lock, are unable to lock the software lock until after the first execution unit has reacquired a lock of the hardware lock and possibly released the software lock while exclusively locking the hardware lock. An execution unit may release a software lock after and while holding a lock of the hardware lock. The hardware lock is released when a software lock has been set or released.",
author = "Jonathan Ross and Ronald Aigner and Rellermeyer, {Jan S.} and Jork Loeser",
year = "2013",
month = jun,
day = "18",
language = "English",
type = "Patent",
note = "US8468169B2; G06F9/526",

}

Download

TY - PAT

T1 - Hierarchical software locking

AU - Ross, Jonathan

AU - Aigner, Ronald

AU - Rellermeyer, Jan S.

AU - Loeser, Jork

PY - 2013/6/18

Y1 - 2013/6/18

N2 - A processor chip may have a built-in hardware lock and deterministic exclusive locking of the hardware lock by execution units executing in parallel on the chip. A set of software locks may be maintained, where the execution units set and release the software locks only by first acquiring a lock of the hardware lock. A first execution unit sets a software lock after acquiring a lock of the hardware lock, and other execution units, even if exclusively locking the hardware lock, are unable to lock the software lock until after the first execution unit has reacquired a lock of the hardware lock and possibly released the software lock while exclusively locking the hardware lock. An execution unit may release a software lock after and while holding a lock of the hardware lock. The hardware lock is released when a software lock has been set or released.

AB - A processor chip may have a built-in hardware lock and deterministic exclusive locking of the hardware lock by execution units executing in parallel on the chip. A set of software locks may be maintained, where the execution units set and release the software locks only by first acquiring a lock of the hardware lock. A first execution unit sets a software lock after acquiring a lock of the hardware lock, and other execution units, even if exclusively locking the hardware lock, are unable to lock the software lock until after the first execution unit has reacquired a lock of the hardware lock and possibly released the software lock while exclusively locking the hardware lock. An execution unit may release a software lock after and while holding a lock of the hardware lock. The hardware lock is released when a software lock has been set or released.

M3 - Patent

M1 - US8468169B2

Y2 - 2010/12/01

ER -

Von denselben Autoren