Data path array with shared memory as core of a high performance DSP

Publikation: Beitrag in Fachzeitschrift › Konferenzaufsatz in Fachzeitschrift › Forschung › Peer-Review

Autoren

  • J. Kneip
  • K. Roenner
  • P. Pirsch

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Details

OriginalspracheEnglisch
Seiten (von - bis)271-282
Seitenumfang12
FachzeitschriftProceedings of the International Conference on Application Specific Array Processors
PublikationsstatusVeröffentlicht - 1994
Veranstaltung1994 International Conference on Application Specific Array Processors - San Francisco, CA, USA
Dauer: 22 Aug. 1994 → 24 Aug. 1994

Abstract

A data path array design combining shared memory communication among the data paths and address and control autonomy of the array elements leads to the powerful core of a high-performance digital signal processor (DSP) on a wide field of image processing applications. Assuming 100 MHz clock frequency for a 4 × 4 array, the processor will perform a 1024 samples complex FFT within 3 μs including data I/O. The Hough transform of a 512 × 512 pel image with 30% black pels is performed within 66 ms, assuming 7 bit quantization for the angle and 11 bit quantization for the radius, thus achieving a sustained arithmetic performance of 2.8 Giga operations per second (GOPS).

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Data path array with shared memory as core of a high performance DSP. / Kneip, J.; Roenner, K.; Pirsch, P.
in: Proceedings of the International Conference on Application Specific Array Processors, 1994, S. 271-282.

Publikation: Beitrag in Fachzeitschrift › Konferenzaufsatz in Fachzeitschrift › Forschung › Peer-Review

Kneip, J, Roenner, K & Pirsch, P 1994, 'Data path array with shared memory as core of a high performance DSP', Proceedings of the International Conference on Application Specific Array Processors, S. 271-282.
Kneip, J., Roenner, K., & Pirsch, P. (1994). Data path array with shared memory as core of a high performance DSP. Proceedings of the International Conference on Application Specific Array Processors, 271-282.
Kneip J, Roenner K, Pirsch P. Data path array with shared memory as core of a high performance DSP. Proceedings of the International Conference on Application Specific Array Processors. 1994;271-282.
Kneip, J. ; Roenner, K. ; Pirsch, P. / Data path array with shared memory as core of a high performance DSP. in: Proceedings of the International Conference on Application Specific Array Processors. 1994 ; S. 271-282.
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