Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | ESSCIRC 2014 - Proceedings of the 40th European Solid-State Circuit Conference |
| Herausgeber/-innen | Pietro Andreani, Andrea Bevilacqua, Gaudenzio Meneghesso |
| Seiten | 159-162 |
| Seitenumfang | 4 |
| ISBN (elektronisch) | 9781479956944 |
| Publikationsstatus | Veröffentlicht - 31 Okt. 2014 |
| Extern publiziert | Ja |
| Veranstaltung | 40th European Solid-State Circuit Conference, ESSCIRC 2014 - Venezia Lido, Italien Dauer: 22 Sept. 2014 → 26 Sept. 2014 |
Publikationsreihe
| Name | European Solid-State Circuits Conference |
|---|---|
| ISSN (Print) | 1930-8833 |
Abstract
Bootstrap circuits are mainly used for supplying a gate driver circuit to provide the gate overdrive voltage for a high-side NMOS transistor. The required charge has to be provided by a bootstrap capacitor which is often too large for integration if an acceptable voltage dip at the capacitor has to be guaranteed. Three options of an area efficient bootstrap circuit for a high side driver with an output stage of two NMOS transistors are proposed. The key idea is that the main bootstrap capacitor is supported by a second bootstrap capacitor, which is charged to a higher voltage and connected when the gate driver turns on. A high voltage swing at the second capacitor leads to a high charge allocation. Both bootstrap capacitors require up to 70% less area compared to a conventional bootstrap circuit. This enables compact power management systems with fewer discrete components and smaller die size. A calculation guideline for optimum bootstrap capacitor sizing is given. The circuit was manufactured in a 180nm high-voltage BiCMOS technology as part of a high-voltage gate driver. Measurements confirm the benefit of high-voltage charge storing. The fully integrated bootstrap circuit including two stacked 75.8pF and 18.9pF capacitors results in a voltage dip lower than 1V. This matches well with the theory of the calculation guideline.
ASJC Scopus Sachgebiete
- Informatik (insg.)
- Hardware und Architektur
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
Zitieren
- Standard
- Harvard
- Apa
- Vancouver
- BibTex
- RIS
ESSCIRC 2014 - Proceedings of the 40th European Solid-State Circuit Conference. Hrsg. / Pietro Andreani; Andrea Bevilacqua; Gaudenzio Meneghesso. 2014. S. 159-162 6942046 (European Solid-State Circuits Conference).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - Bootstrap circuit with high-voltage charge storing for area efficient gate drivers in power management systems
AU - Seidel, Achim
AU - Costa, Marco
AU - Joos, Joachim
AU - Wicht, Bernhard
N1 - Publisher Copyright: © 2014 IEEE.
PY - 2014/10/31
Y1 - 2014/10/31
N2 - Bootstrap circuits are mainly used for supplying a gate driver circuit to provide the gate overdrive voltage for a high-side NMOS transistor. The required charge has to be provided by a bootstrap capacitor which is often too large for integration if an acceptable voltage dip at the capacitor has to be guaranteed. Three options of an area efficient bootstrap circuit for a high side driver with an output stage of two NMOS transistors are proposed. The key idea is that the main bootstrap capacitor is supported by a second bootstrap capacitor, which is charged to a higher voltage and connected when the gate driver turns on. A high voltage swing at the second capacitor leads to a high charge allocation. Both bootstrap capacitors require up to 70% less area compared to a conventional bootstrap circuit. This enables compact power management systems with fewer discrete components and smaller die size. A calculation guideline for optimum bootstrap capacitor sizing is given. The circuit was manufactured in a 180nm high-voltage BiCMOS technology as part of a high-voltage gate driver. Measurements confirm the benefit of high-voltage charge storing. The fully integrated bootstrap circuit including two stacked 75.8pF and 18.9pF capacitors results in a voltage dip lower than 1V. This matches well with the theory of the calculation guideline.
AB - Bootstrap circuits are mainly used for supplying a gate driver circuit to provide the gate overdrive voltage for a high-side NMOS transistor. The required charge has to be provided by a bootstrap capacitor which is often too large for integration if an acceptable voltage dip at the capacitor has to be guaranteed. Three options of an area efficient bootstrap circuit for a high side driver with an output stage of two NMOS transistors are proposed. The key idea is that the main bootstrap capacitor is supported by a second bootstrap capacitor, which is charged to a higher voltage and connected when the gate driver turns on. A high voltage swing at the second capacitor leads to a high charge allocation. Both bootstrap capacitors require up to 70% less area compared to a conventional bootstrap circuit. This enables compact power management systems with fewer discrete components and smaller die size. A calculation guideline for optimum bootstrap capacitor sizing is given. The circuit was manufactured in a 180nm high-voltage BiCMOS technology as part of a high-voltage gate driver. Measurements confirm the benefit of high-voltage charge storing. The fully integrated bootstrap circuit including two stacked 75.8pF and 18.9pF capacitors results in a voltage dip lower than 1V. This matches well with the theory of the calculation guideline.
UR - http://www.scopus.com/inward/record.url?scp=84909947358&partnerID=8YFLogxK
U2 - 10.1109/ESSCIRC.2014.6942046
DO - 10.1109/ESSCIRC.2014.6942046
M3 - Conference contribution
AN - SCOPUS:84909947358
T3 - European Solid-State Circuits Conference
SP - 159
EP - 162
BT - ESSCIRC 2014 - Proceedings of the 40th European Solid-State Circuit Conference
A2 - Andreani, Pietro
A2 - Bevilacqua, Andrea
A2 - Meneghesso, Gaudenzio
T2 - 40th European Solid-State Circuit Conference, ESSCIRC 2014
Y2 - 22 September 2014 through 26 September 2014
ER -