Architecture of a hardware module for MPEG-4 shape decoding

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Autoren

  • M. Berekovic
  • K. Jacob
  • P. Pirsch
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Details

OriginalspracheEnglisch
Titel des SammelwerksProceedings
UntertitelIEEE International Symposium on Circuits and Systems
SeitenI-157 - I-160
PublikationsstatusVeröffentlicht - 1999
Veranstaltung1999 IEEE International Symposium on Circuits and Systems, ISCAS 1999 - Orlando, USA / Vereinigte Staaten
Dauer: 30 Mai 19992 Juni 1999

Publikationsreihe

NameProceedings - IEEE International Symposium on Circuits and Systems
Band1
ISSN (Print)0271-4310

Abstract

MPEG-4 shape coding comprises Context based binary Arithmetic Encoding (CAE) as its centerpiece. The architecture of a dedicated hardware acceleration module for CAE shape decoding is presented. Synthesis with a 3LM 0.5μ CMOS library provides a size estimate of 9200 gates plus 3KB of ROM, which equals approximately 5 mm2 silicon area. The module achieves a throughput rate of 63 MPixel/s.

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Architecture of a hardware module for MPEG-4 shape decoding. / Berekovic, M.; Jacob, K.; Pirsch, P.
Proceedings : IEEE International Symposium on Circuits and Systems. 1999. S. I-157 - I-160 (Proceedings - IEEE International Symposium on Circuits and Systems; Band 1).

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Berekovic, M, Jacob, K & Pirsch, P 1999, Architecture of a hardware module for MPEG-4 shape decoding. in Proceedings : IEEE International Symposium on Circuits and Systems. Proceedings - IEEE International Symposium on Circuits and Systems, Bd. 1, S. I-157 - I-160, 1999 IEEE International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA / Vereinigte Staaten, 30 Mai 1999.
Berekovic, M., Jacob, K., & Pirsch, P. (1999). Architecture of a hardware module for MPEG-4 shape decoding. In Proceedings : IEEE International Symposium on Circuits and Systems (S. I-157 - I-160). (Proceedings - IEEE International Symposium on Circuits and Systems; Band 1).
Berekovic M, Jacob K, Pirsch P. Architecture of a hardware module for MPEG-4 shape decoding. in Proceedings : IEEE International Symposium on Circuits and Systems. 1999. S. I-157 - I-160. (Proceedings - IEEE International Symposium on Circuits and Systems).
Berekovic, M. ; Jacob, K. ; Pirsch, P. / Architecture of a hardware module for MPEG-4 shape decoding. Proceedings : IEEE International Symposium on Circuits and Systems. 1999. S. I-157 - I-160 (Proceedings - IEEE International Symposium on Circuits and Systems).
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