Architecture of a flexible on-board real-time SAR-processor

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Autoren

  • S. Langemeyer
  • C. Simon-Klar
  • N. Nolte
  • P. Pirsch

Organisationseinheiten

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Details

OriginalspracheEnglisch
Titel des Sammelwerks25th Anniversary IGARSS 2005
UntertitelIEEE International Geoscience and Remote Sensing Symposium
Seiten1746-1749
Seitenumfang4
PublikationsstatusVeröffentlicht - 2005
Veranstaltung2005 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2005 - Seoul, Südkorea
Dauer: 25 Juli 2005 → 29 Juli 2005

Publikationsreihe

NameInternational Geoscience and Remote Sensing Symposium (IGARSS)
Band3

Abstract

In compact airborne SAR systems on-board processing requires a programmable and compact Multi-DSP solution. At the Laboratorium für Informationstechnologie (LfI), University of Hannover, a flexible Multi-DSP-Board has been developed. The architecture is based on the HiBRID-SoC, a programmable multi-core processor, optimized for SAR processing and image coding algorithms. Equiped with 6 HiBRID-SoCs a 233×175×15 mm board provides a realtime capability of processing SAR images with a raw data-rate of 50 MBit/s. Additional features are ROI support and image coding to reduce the required downlink bandwidth. The small volume and it's power consumption of less than 35 W enables it for on-board usage in air- or spaceborne systems. This paper presents the architecture of the system and explains how the different processing steps are mapped to the proposed hardware.

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Architecture of a flexible on-board real-time SAR-processor. / Langemeyer, S.; Simon-Klar, C.; Nolte, N. et al.
25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium. 2005. S. 1746-1749 1526340 (International Geoscience and Remote Sensing Symposium (IGARSS); Band 3).

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Langemeyer, S, Simon-Klar, C, Nolte, N & Pirsch, P 2005, Architecture of a flexible on-board real-time SAR-processor. in 25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium., 1526340, International Geoscience and Remote Sensing Symposium (IGARSS), Bd. 3, S. 1746-1749, 2005 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2005, Seoul, Südkorea, 25 Juli 2005. https://doi.org/10.1109/IGARSS.2005.1526340
Langemeyer, S., Simon-Klar, C., Nolte, N., & Pirsch, P. (2005). Architecture of a flexible on-board real-time SAR-processor. In 25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium (S. 1746-1749). Artikel 1526340 (International Geoscience and Remote Sensing Symposium (IGARSS); Band 3). https://doi.org/10.1109/IGARSS.2005.1526340
Langemeyer S, Simon-Klar C, Nolte N, Pirsch P. Architecture of a flexible on-board real-time SAR-processor. in 25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium. 2005. S. 1746-1749. 1526340. (International Geoscience and Remote Sensing Symposium (IGARSS)). doi: 10.1109/IGARSS.2005.1526340
Langemeyer, S. ; Simon-Klar, C. ; Nolte, N. et al. / Architecture of a flexible on-board real-time SAR-processor. 25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium. 2005. S. 1746-1749 (International Geoscience and Remote Sensing Symposium (IGARSS)).
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