Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Autoren

  • H. D.B. Gottlob
  • T. Echtermeyer
  • T. Mollenhauer
  • M. Schmidt
  • J. K. Efavi
  • T. Wahlbrink
  • M. C. Lemme
  • H. Kurz
  • R. Endres
  • Y. Stefanov
  • U. Schwalke
  • M. Czernohorsky
  • E. Bugiel
  • A. Fissel
  • H. J. Osten

Externe Organisationen

  • AMO GmbH
  • Technische Universität Darmstadt
Forschungs-netzwerk anzeigen

Details

OriginalspracheEnglisch
Titel des SammelwerksESSDERC 2006
UntertitelProceedings of the 36th European Solid-State Device Research Conference
Herausgeber (Verlag)IEEE Computer Society
Seiten150-153
Seitenumfang4
ISBN (Print)1424403014, 9781424403011
PublikationsstatusVeröffentlicht - 2006
VeranstaltungESSDERC 2006 - 36th European Solid-State Device Research Conference - Montreux, Schweiz
Dauer: 19 Sept. 200621 Sept. 2006

Abstract

Two process concepts for Integration of novel gate stacks with epitaxial high-K dielectrics and metal gate electrodes are presented. A "gate first" process based on a planar gate stack on ultra thin SOI material has been used for successful fabrication of MOSFETs with TiN/Gd3O 3 gate stack. Furthermore MOSFETs with W/Gd2O3 gate stack have been fabricated with a replacement gate process. This is the first successful attempt to integrate crystalline high-K dielectrics into a "gentle" damascene metal gate process in order to reduce process induced oxide damages.

ASJC Scopus Sachgebiete

Zitieren

Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics. / Gottlob, H. D.B.; Echtermeyer, T.; Mollenhauer, T. et al.
ESSDERC 2006 : Proceedings of the 36th European Solid-State Device Research Conference. IEEE Computer Society, 2006. S. 150-153 4099878.

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Gottlob, HDB, Echtermeyer, T, Mollenhauer, T, Schmidt, M, Efavi, JK, Wahlbrink, T, Lemme, MC, Kurz, H, Endres, R, Stefanov, Y, Schwalke, U, Czernohorsky, M, Bugiel, E, Fissel, A & Osten, HJ 2006, Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics. in ESSDERC 2006 : Proceedings of the 36th European Solid-State Device Research Conference., 4099878, IEEE Computer Society, S. 150-153, ESSDERC 2006 - 36th European Solid-State Device Research Conference, Montreux, Schweiz, 19 Sept. 2006. https://doi.org/10.1109/ESSDER.2006.307660
Gottlob, H. D. B., Echtermeyer, T., Mollenhauer, T., Schmidt, M., Efavi, J. K., Wahlbrink, T., Lemme, M. C., Kurz, H., Endres, R., Stefanov, Y., Schwalke, U., Czernohorsky, M., Bugiel, E., Fissel, A., & Osten, H. J. (2006). Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics. In ESSDERC 2006 : Proceedings of the 36th European Solid-State Device Research Conference (S. 150-153). Artikel 4099878 IEEE Computer Society. https://doi.org/10.1109/ESSDER.2006.307660
Gottlob HDB, Echtermeyer T, Mollenhauer T, Schmidt M, Efavi JK, Wahlbrink T et al. Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics. in ESSDERC 2006 : Proceedings of the 36th European Solid-State Device Research Conference. IEEE Computer Society. 2006. S. 150-153. 4099878 doi: 10.1109/ESSDER.2006.307660
Gottlob, H. D.B. ; Echtermeyer, T. ; Mollenhauer, T. et al. / Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics. ESSDERC 2006 : Proceedings of the 36th European Solid-State Device Research Conference. IEEE Computer Society, 2006. S. 150-153
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abstract = "Two process concepts for Integration of novel gate stacks with epitaxial high-K dielectrics and metal gate electrodes are presented. A {"}gate first{"} process based on a planar gate stack on ultra thin SOI material has been used for successful fabrication of MOSFETs with TiN/Gd3O 3 gate stack. Furthermore MOSFETs with W/Gd2O3 gate stack have been fabricated with a replacement gate process. This is the first successful attempt to integrate crystalline high-K dielectrics into a {"}gentle{"} damascene metal gate process in order to reduce process induced oxide damages.",
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AU - Gottlob, H. D.B.

AU - Echtermeyer, T.

AU - Mollenhauer, T.

AU - Schmidt, M.

AU - Efavi, J. K.

AU - Wahlbrink, T.

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AU - Kurz, H.

AU - Endres, R.

AU - Stefanov, Y.

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AB - Two process concepts for Integration of novel gate stacks with epitaxial high-K dielectrics and metal gate electrodes are presented. A "gate first" process based on a planar gate stack on ultra thin SOI material has been used for successful fabrication of MOSFETs with TiN/Gd3O 3 gate stack. Furthermore MOSFETs with W/Gd2O3 gate stack have been fabricated with a replacement gate process. This is the first successful attempt to integrate crystalline high-K dielectrics into a "gentle" damascene metal gate process in order to reduce process induced oxide damages.

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