Applying temperature-sensitive electrical parameters to SiC power modules considering parasitic effects

Publikation: Qualifikations-/Studienabschlussarbeit › Dissertation

Autoren

  • Daniel Herwig

Organisationseinheiten

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Details

OriginalspracheEnglisch
QualifikationDoktor der Ingenieurwissenschaften
Gradverleihende Hochschule
Betreut von
  • Axel Mertens, Betreuer*in
Förderer
  • Bundesministerium für Bildung und Forschung (BMBF)
Datum der Verleihung des Grades7 Aug. 2023
ErscheinungsortHannover
PublikationsstatusVeröffentlicht - 2023

Abstract

Temperatursensitive elektrische Parameter (TSEPs) können für die Zustandsüberwachung von unmodifizierten Leistungsmodulen oder zur Bestimmung der virtuellen Sperrschichttemperatur von Leistungshalbleitern eingesetzt werden. Die Erfassung von TSEPs an schnellschaltenden Wide-Bandgap-Halbleitern stellt dabei besondere Herausforderungen an die benötigte Messauflösung und die Störempfindlichkeit der Messschaltungen. Neben der Sperrschichttemperatur werden TSEPs von einer Vielzahl von anderen Größen beeinflusst. Diese Querempfindlichkeiten können in solche unterteilt werden, die bereits im normalen Umrichterbetrieb miterfasst werden, zum Beispiel der Laststrom, und in parasitäre Einflüsse, welche nur schwer zu bestimmen sind oder deren Erfassungsaufwand zu groß wäre. Parasitäre Störeinflüsse können zu signifikanten Abweichungen in der bestimmten virtuellen Sperrschichttemperatur führen. In dieser Dissertation wird die Anwendbarkeit von TSEPs an schnellschaltenden SiC-MOSFETs, unter besonderer Beachtung von parasitären Störeinflüssen, untersucht. Beispiele von parasitären Störeinflüssen sind Änderungen der Treibertemperatur oder Instabilitäten der Gatetreiberspannungen. Das Ziel ist die rechtzeitige Erkennung eines bevorstehenden Modulausfalls. Mehrere TSEPs werden in direkter Abfolge erfasst und anschließend kombiniert. Die betrachteten TSEPs sind die Durchlassspannungen der SiC-MOSFETs sowie zwei Schaltzeiten während des Einschaltvorgangs. Die Kombination erlaubt die Reduktion von parasitären Störeinflüssen. Dabei wird insbesondere die Eignung von künstlichen neuronalen Netzen zur Kombination der TSEPs zu einer vereinten Temperaturaussage untersucht und mit Ansätzen verglichen, die auf den physikalischen Wirkprinzipien der Halbleiter beruhen. Eine Vielzahl detaillierter Halbleitermodelle werden gebildet, deren Eignung zur Unterscheidung temperaturbedingter und strombedingter Änderungen der betrachteten TSEPs ermittelt wird. Dabei wird auch untersucht, welcher Detaillierungsgrad der Modelle für eine Temperaturbestimmung nötig ist. Neben den theoretischen Untersuchungen wird Messhardware zur Erfassung der Durchlassspannung sowie der Schaltzeiten von schnellschaltenden SiC-MOSFETs untersucht und entworfen. Diese Messhardware wird genutzt, um TSEPs sowohl in Doppelpulsversuchen als auch im regulären Schaltbetrieb zu erfassen. Dabei entstehen durch die kurzen Leitphasen der schnellschaltenden SiC-MOSFETs sowie durch schaltbetriebsspezifische Effekte besondere Herausforderungen. Ein detailliertes thermisches Modell der Module sowie des Prüfstands wird erstellt. Zusätzlich entsteht ein Strommodell, welches die Bestimmung des Momentanstromwertes beim Einschalten der Halbleiter aus dem skalaren Messwert des regulären Umrichterstromsensors erlaubt. Abschließend werden beschleunigte Alterungstests durchgeführt. Dabei werden mehrere Leistungsmodule mit thermischen Lastzyklen beaufschlagt, um realistische thermomechanische Alterungseffekte zu erzeugen. Die Leistungsmodule werden während der Alterung regelmäßig mit der TSEP-Messhardware analysiert. Mit den Testergebnissen wird verifiziert, dass die TSEP-Messhardware genutzt werden kann, um eine Degradation der Leistungsmodule rechtzeitig vor dem Erreichen des Endes der Lebensdauer der Module zu erkennen.

Zitieren

Applying temperature-sensitive electrical parameters to SiC power modules considering parasitic effects. / Herwig, Daniel.
Hannover, 2023. 341 S.

Publikation: Qualifikations-/Studienabschlussarbeit › Dissertation

Herwig, D 2023, 'Applying temperature-sensitive electrical parameters to SiC power modules considering parasitic effects', Doktor der Ingenieurwissenschaften, Gottfried Wilhelm Leibniz Universität Hannover, Hannover. https://doi.org/10.15488/15128
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@phdthesis{f5929c33ff8f4722b188d121ceec8946,
title = "Applying temperature-sensitive electrical parameters to SiC power modules considering parasitic effects",
abstract = "Temperature-sensitive electrical parameters (TSEPs) can be used to monitor the condition of unmodified power modules or to measure the virtual junction temperature of a semiconductor. The measurement of TSEPs on fast-switching wide-bandgap semiconductors poses new challenges with regard to the required measurement accuracy and the high EMI tolerance capability. Furthermore, TSEPs are affected by many parameters beside the virtual junction temperature or the degradation state of the module. These cross-dependencies can be separated into parameters that are typically measured during operation, e.g., the load current, and parasitic impacts that are unknown, or cannot be feasibly acquired. In this thesis, the application of TSEPs to fast-switching wide-bandgap silicon carbide (SiC) MOSFETs is studied, giving special consideration to parasitic impacts. Examples of these impacts are changes in the gate driver's temperature or instabilities in the gate driver's voltages. Parasitic impacts can lead to significant deviations in the virtual junction temperature determined. Several TSEPs are acquired simultaneously and combined to reduce the effects of these impacts on the TSEP-based temperature estimation. The TSEPs used are the on-state voltages of the switches and two switching times during turn-on. The suitability of artificial neural networks for combining and mapping multiple TSEPs to a single virtual junction temperature estimate is investigated and compared to physics-based approaches. A variety of detailed analytical models representing the on-state voltage and switching times during turn-on are investigated, including SiC-specific effects. The aim is to determine which level of model complexity is necessary to separate the temperature-dependent behavior from the current-dependent behavior of the considered TSEPs. Simultaneously, the analytical modeling identifies numerous possible parasitic impact factors which affect the measurement of TSEPs. Beside the theoretical aspects, TSEP measurement hardware for the on-state voltage and switching times of SiC MOSFETs is designed. This is used to acquire TSEP measurements in double-pulse experiments as well as during continuous PWM operation. Challenges arising from the short conduction phases at high switching frequencies and also from PWM-specific effects are studied and compensation concepts are presented. Detailed thermal models of the power module and test setup are created, together with a current model which determines the instantaneous current during turn-on from the scalar current sample provided by the inverter sensors. Finally, accelerated aging tests are conducted. Several power modules are power cycled until they reach their end of life. During the testing they are periodically analyzed with the TSEP measurement system. The test results verify that the TSEP measurement system is capable of detecting thermomechanical degradation mechanisms before the module reaches its end of life.",
author = "Daniel Herwig",
year = "2023",
doi = "10.15488/15128",
language = "English",
school = "Leibniz University Hannover",

}

Download

TY - BOOK

T1 - Applying temperature-sensitive electrical parameters to SiC power modules considering parasitic effects

AU - Herwig, Daniel

PY - 2023

Y1 - 2023

N2 - Temperature-sensitive electrical parameters (TSEPs) can be used to monitor the condition of unmodified power modules or to measure the virtual junction temperature of a semiconductor. The measurement of TSEPs on fast-switching wide-bandgap semiconductors poses new challenges with regard to the required measurement accuracy and the high EMI tolerance capability. Furthermore, TSEPs are affected by many parameters beside the virtual junction temperature or the degradation state of the module. These cross-dependencies can be separated into parameters that are typically measured during operation, e.g., the load current, and parasitic impacts that are unknown, or cannot be feasibly acquired. In this thesis, the application of TSEPs to fast-switching wide-bandgap silicon carbide (SiC) MOSFETs is studied, giving special consideration to parasitic impacts. Examples of these impacts are changes in the gate driver's temperature or instabilities in the gate driver's voltages. Parasitic impacts can lead to significant deviations in the virtual junction temperature determined. Several TSEPs are acquired simultaneously and combined to reduce the effects of these impacts on the TSEP-based temperature estimation. The TSEPs used are the on-state voltages of the switches and two switching times during turn-on. The suitability of artificial neural networks for combining and mapping multiple TSEPs to a single virtual junction temperature estimate is investigated and compared to physics-based approaches. A variety of detailed analytical models representing the on-state voltage and switching times during turn-on are investigated, including SiC-specific effects. The aim is to determine which level of model complexity is necessary to separate the temperature-dependent behavior from the current-dependent behavior of the considered TSEPs. Simultaneously, the analytical modeling identifies numerous possible parasitic impact factors which affect the measurement of TSEPs. Beside the theoretical aspects, TSEP measurement hardware for the on-state voltage and switching times of SiC MOSFETs is designed. This is used to acquire TSEP measurements in double-pulse experiments as well as during continuous PWM operation. Challenges arising from the short conduction phases at high switching frequencies and also from PWM-specific effects are studied and compensation concepts are presented. Detailed thermal models of the power module and test setup are created, together with a current model which determines the instantaneous current during turn-on from the scalar current sample provided by the inverter sensors. Finally, accelerated aging tests are conducted. Several power modules are power cycled until they reach their end of life. During the testing they are periodically analyzed with the TSEP measurement system. The test results verify that the TSEP measurement system is capable of detecting thermomechanical degradation mechanisms before the module reaches its end of life.

AB - Temperature-sensitive electrical parameters (TSEPs) can be used to monitor the condition of unmodified power modules or to measure the virtual junction temperature of a semiconductor. The measurement of TSEPs on fast-switching wide-bandgap semiconductors poses new challenges with regard to the required measurement accuracy and the high EMI tolerance capability. Furthermore, TSEPs are affected by many parameters beside the virtual junction temperature or the degradation state of the module. These cross-dependencies can be separated into parameters that are typically measured during operation, e.g., the load current, and parasitic impacts that are unknown, or cannot be feasibly acquired. In this thesis, the application of TSEPs to fast-switching wide-bandgap silicon carbide (SiC) MOSFETs is studied, giving special consideration to parasitic impacts. Examples of these impacts are changes in the gate driver's temperature or instabilities in the gate driver's voltages. Parasitic impacts can lead to significant deviations in the virtual junction temperature determined. Several TSEPs are acquired simultaneously and combined to reduce the effects of these impacts on the TSEP-based temperature estimation. The TSEPs used are the on-state voltages of the switches and two switching times during turn-on. The suitability of artificial neural networks for combining and mapping multiple TSEPs to a single virtual junction temperature estimate is investigated and compared to physics-based approaches. A variety of detailed analytical models representing the on-state voltage and switching times during turn-on are investigated, including SiC-specific effects. The aim is to determine which level of model complexity is necessary to separate the temperature-dependent behavior from the current-dependent behavior of the considered TSEPs. Simultaneously, the analytical modeling identifies numerous possible parasitic impact factors which affect the measurement of TSEPs. Beside the theoretical aspects, TSEP measurement hardware for the on-state voltage and switching times of SiC MOSFETs is designed. This is used to acquire TSEP measurements in double-pulse experiments as well as during continuous PWM operation. Challenges arising from the short conduction phases at high switching frequencies and also from PWM-specific effects are studied and compensation concepts are presented. Detailed thermal models of the power module and test setup are created, together with a current model which determines the instantaneous current during turn-on from the scalar current sample provided by the inverter sensors. Finally, accelerated aging tests are conducted. Several power modules are power cycled until they reach their end of life. During the testing they are periodically analyzed with the TSEP measurement system. The test results verify that the TSEP measurement system is capable of detecting thermomechanical degradation mechanisms before the module reaches its end of life.

U2 - 10.15488/15128

DO - 10.15488/15128

M3 - Doctoral thesis

CY - Hannover

ER -