Details
Originalsprache | Englisch |
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Titel des Sammelwerks | Field Programmable Logic and Applications |
Untertitel | 9th International Workshop, FPL 1999, Proceedings |
Herausgeber/-innen | Patrick Lysaght, James Irvine, Reiner W. Hartenstein |
Herausgeber (Verlag) | Springer Verlag |
Seiten | 333-338 |
Seitenumfang | 6 |
ISBN (Print) | 3540664572, 9783540664574 |
Publikationsstatus | Veröffentlicht - 1999 |
Veranstaltung | 9th International Workshop on Field Programmable Logic and Applications, FPL 1999 - Glasgow, Großbritannien / Vereinigtes Königreich Dauer: 30 Aug. 1999 → 1 Sept. 1999 |
Publikationsreihe
Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
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Band | 1673 |
ISSN (Print) | 0302-9743 |
ISSN (elektronisch) | 1611-3349 |
Abstract
A real-time prototyping environment for complete video processing schemes is presented. To realize a real-time processing, a commercial FPGA- based prototyping system is extended by a special video interface, efficient pipelined FPGA macros, and a modified design flow. Reductions of 48% in terms of FPGA resources, and 80% of compilation time are achievable. The feasibility of the prototyping environment is shown for a complete H.263 video codec.
ASJC Scopus Sachgebiete
- Mathematik (insg.)
- Theoretische Informatik
- Informatik (insg.)
- Allgemeine Computerwissenschaft
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- RIS
Field Programmable Logic and Applications : 9th International Workshop, FPL 1999, Proceedings. Hrsg. / Patrick Lysaght; James Irvine; Reiner W. Hartenstein. Springer Verlag, 1999. S. 333-338 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Band 1673).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - An FPGA-based prototyping system for real-time verification of video processing schemes
AU - Kropp, Holger
AU - Reuter, Carsten
AU - Wiege, Matthias
AU - Do, Tien Toan
AU - Pirsch, Peter
PY - 1999
Y1 - 1999
N2 - A real-time prototyping environment for complete video processing schemes is presented. To realize a real-time processing, a commercial FPGA- based prototyping system is extended by a special video interface, efficient pipelined FPGA macros, and a modified design flow. Reductions of 48% in terms of FPGA resources, and 80% of compilation time are achievable. The feasibility of the prototyping environment is shown for a complete H.263 video codec.
AB - A real-time prototyping environment for complete video processing schemes is presented. To realize a real-time processing, a commercial FPGA- based prototyping system is extended by a special video interface, efficient pipelined FPGA macros, and a modified design flow. Reductions of 48% in terms of FPGA resources, and 80% of compilation time are achievable. The feasibility of the prototyping environment is shown for a complete H.263 video codec.
UR - http://www.scopus.com/inward/record.url?scp=84889873758&partnerID=8YFLogxK
U2 - 10.1007/978-3-540-48302-1_34
DO - 10.1007/978-3-540-48302-1_34
M3 - Conference contribution
AN - SCOPUS:84889873758
SN - 3540664572
SN - 9783540664574
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 333
EP - 338
BT - Field Programmable Logic and Applications
A2 - Lysaght, Patrick
A2 - Irvine, James
A2 - Hartenstein, Reiner W.
PB - Springer Verlag
T2 - 9th International Workshop on Field Programmable Logic and Applications, FPL 1999
Y2 - 30 August 1999 through 1 September 1999
ER -