Loading [MathJax]/extensions/tex2jax.js

An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Autorschaft

Externe Organisationen

  • Exzellenzcluster Hearing4all

Details

OriginalspracheEnglisch
Titel des Sammelwerks2015 IEEE Workshop on Signal Processing Systems (SiPS)
Herausgeber (Verlag)IEEE Computer Society
ISBN (elektronisch)9781467396042
PublikationsstatusVeröffentlicht - 3 Dez. 2015
VeranstaltungIEEE International Workshop on Signal Processing Systems, SiPS 2015 - Hangzhou, China
Dauer: 14 Okt. 201516 Okt. 2015

ASJC Scopus Sachgebiete

Zitieren

An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors. / Gerlach, Lukas; Payá-Vayá, Guillermo; Blume, Holger.
2015 IEEE Workshop on Signal Processing Systems (SiPS). IEEE Computer Society, 2015.

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Gerlach, L, Payá-Vayá, G & Blume, H 2015, An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors. in 2015 IEEE Workshop on Signal Processing Systems (SiPS). IEEE Computer Society, IEEE International Workshop on Signal Processing Systems, SiPS 2015, Hangzhou, China, 14 Okt. 2015. https://doi.org/10.1109/SiPS.2015.7345019
Gerlach, L., Payá-Vayá, G., & Blume, H. (2015). An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors. In 2015 IEEE Workshop on Signal Processing Systems (SiPS) IEEE Computer Society. https://doi.org/10.1109/SiPS.2015.7345019
Gerlach L, Payá-Vayá G, Blume H. An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors. in 2015 IEEE Workshop on Signal Processing Systems (SiPS). IEEE Computer Society. 2015 doi: 10.1109/SiPS.2015.7345019
Gerlach, Lukas ; Payá-Vayá, Guillermo ; Blume, Holger. / An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors. 2015 IEEE Workshop on Signal Processing Systems (SiPS). IEEE Computer Society, 2015.
Download
@inproceedings{c297a9c19e9c46108fac56dcc1671fa7,
title = "An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors",
author = "Lukas Gerlach and Guillermo Pay{\'a}-Vay{\'a} and Holger Blume",
year = "2015",
month = dec,
day = "3",
doi = "10.1109/SiPS.2015.7345019",
language = "English",
booktitle = "2015 IEEE Workshop on Signal Processing Systems (SiPS)",
publisher = "IEEE Computer Society",
address = "United States",
note = "IEEE International Workshop on Signal Processing Systems, SiPS 2015 ; Conference date: 14-10-2015 Through 16-10-2015",

}

Download

TY - GEN

T1 - An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors

AU - Gerlach, Lukas

AU - Payá-Vayá, Guillermo

AU - Blume, Holger

PY - 2015/12/3

Y1 - 2015/12/3

UR - http://www.scopus.com/inward/record.url?scp=84958211688&partnerID=8YFLogxK

U2 - 10.1109/SiPS.2015.7345019

DO - 10.1109/SiPS.2015.7345019

M3 - Conference contribution

AN - SCOPUS:84958211688

BT - 2015 IEEE Workshop on Signal Processing Systems (SiPS)

PB - IEEE Computer Society

T2 - IEEE International Workshop on Signal Processing Systems, SiPS 2015

Y2 - 14 October 2015 through 16 October 2015

ER -

Von denselben Autoren