Details
Originalsprache | Englisch |
---|---|
Titel des Sammelwerks | Proceedings 1998 |
Untertitel | Design and Automation Conference, DAC 1998 |
Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers Inc. |
Seiten | 50-55 |
Seitenumfang | 6 |
ISBN (Print) | 078034409X |
Publikationsstatus | Veröffentlicht - Mai 1998 |
Veranstaltung | 35th Design and Automation Conference, DAC 1998 - San Francisco, USA / Vereinigte Staaten Dauer: 15 Juni 1998 → 19 Juni 1998 |
Publikationsreihe
Name | Proceedings - Design Automation Conference |
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ISSN (Print) | 0738-100X |
Abstract
The video signal processor AxPe1280V has been developed for implementation of different video coding applications according to standards like ITU-T H.261/H.263, and ISO MPEG-1I2. It consists of a RISC processor supplemented by a coprocessor for convolution-like low-level tasks. RISC and coprocessor have been implemented in a standard cell design combined with full-custom modules. The processor was fabricated in a 0.5 μm CMOS technology and has a die size of 82 mm2. It provides a peak performance of more than 1 giga arithmetic operations per second (GOPS) at 66 MHz. For processing of very computation-intensive algorithms or high data rates, several processors can be bus-connected to form a MIMD multiprocessor system.
ASJC Scopus Sachgebiete
- Informatik (insg.)
- Angewandte Informatik
- Ingenieurwesen (insg.)
- Steuerungs- und Systemtechnik
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
- Mathematik (insg.)
- Modellierung und Simulation
- Informatik (insg.)
- Hardware und Architektur
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Proceedings 1998 : Design and Automation Conference, DAC 1998. Institute of Electrical and Electronics Engineers Inc., 1998. S. 50-55 724438 (Proceedings - Design Automation Conference).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - A video signal processor for MIMD multiprocessing
AU - Hilgenstock, Jörg
AU - Herrmann, Klaus
AU - Otterstedt, Jan
AU - Niggemeyer, Dirk
AU - Pirsch, Peter
N1 - Funding Information: The authors would like to thank Klaus Gaedke and Hartwig Jeschke for their contributions to this project. Furthermore we thank Axel Wemer and Jens Castagne from Philips Semiconductors ASIC Sup- port Centre, Hamburg, for providing full custom modules, the lay-out, and the fabrication of the processor. This work is supported by FhG under contract no. T/F41B/TO183/P1307.
PY - 1998/5
Y1 - 1998/5
N2 - The video signal processor AxPe1280V has been developed for implementation of different video coding applications according to standards like ITU-T H.261/H.263, and ISO MPEG-1I2. It consists of a RISC processor supplemented by a coprocessor for convolution-like low-level tasks. RISC and coprocessor have been implemented in a standard cell design combined with full-custom modules. The processor was fabricated in a 0.5 μm CMOS technology and has a die size of 82 mm2. It provides a peak performance of more than 1 giga arithmetic operations per second (GOPS) at 66 MHz. For processing of very computation-intensive algorithms or high data rates, several processors can be bus-connected to form a MIMD multiprocessor system.
AB - The video signal processor AxPe1280V has been developed for implementation of different video coding applications according to standards like ITU-T H.261/H.263, and ISO MPEG-1I2. It consists of a RISC processor supplemented by a coprocessor for convolution-like low-level tasks. RISC and coprocessor have been implemented in a standard cell design combined with full-custom modules. The processor was fabricated in a 0.5 μm CMOS technology and has a die size of 82 mm2. It provides a peak performance of more than 1 giga arithmetic operations per second (GOPS) at 66 MHz. For processing of very computation-intensive algorithms or high data rates, several processors can be bus-connected to form a MIMD multiprocessor system.
UR - http://www.scopus.com/inward/record.url?scp=0031630292&partnerID=8YFLogxK
U2 - 10.1145/277044.277054
DO - 10.1145/277044.277054
M3 - Conference contribution
AN - SCOPUS:0031630292
SN - 078034409X
T3 - Proceedings - Design Automation Conference
SP - 50
EP - 55
BT - Proceedings 1998
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 35th Design and Automation Conference, DAC 1998
Y2 - 15 June 1998 through 19 June 1998
ER -