A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Autoren

  • Christopher Bartels
  • Chao Zhang
  • Guillermo Payá-Vayá
  • Holger Blume

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Details

OriginalspracheEnglisch
Titel des SammelwerksArchitecture of Computing Systems - ARCS 2015
UntertitelProceedings
Herausgeber/-innenLuís Miguel Pinho, Wolfgang Karl, Uwe Brinkschulte, Albert Cohen
Herausgeber (Verlag)Springer Verlag
Seiten161-172
Seitenumfang12
ISBN (elektronisch)9783319160856
ISBN (Print)978-3-319-16085-6
PublikationsstatusVeröffentlicht - 11 März 2015
VeranstaltungInternational Conference on Architecture of Computing Systems, ARCS 2015 - Porto, Portugal
Dauer: 24 März 2015 → 27 März 2015
Konferenznummer: 28

Publikationsreihe

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Band9017
ISSN (Print)0302-9743
ISSN (elektronisch)1611-3349

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A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability. / Bartels, Christopher; Zhang, Chao; Payá-Vayá, Guillermo et al.
Architecture of Computing Systems - ARCS 2015: Proceedings. Hrsg. / Luís Miguel Pinho; Wolfgang Karl; Uwe Brinkschulte; Albert Cohen. Springer Verlag, 2015. S. 161-172 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Band 9017).

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Bartels, C, Zhang, C, Payá-Vayá, G & Blume, H 2015, A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability. in LM Pinho, W Karl, U Brinkschulte & A Cohen (Hrsg.), Architecture of Computing Systems - ARCS 2015: Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Bd. 9017, Springer Verlag, S. 161-172, International Conference on Architecture of Computing Systems, ARCS 2015, Porto, Portugal, 24 März 2015. https://doi.org/10.1007/978-3-319-16086-3_13
Bartels, C., Zhang, C., Payá-Vayá, G., & Blume, H. (2015). A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability. In L. M. Pinho, W. Karl, U. Brinkschulte, & A. Cohen (Hrsg.), Architecture of Computing Systems - ARCS 2015: Proceedings (S. 161-172). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Band 9017). Springer Verlag. https://doi.org/10.1007/978-3-319-16086-3_13
Bartels C, Zhang C, Payá-Vayá G, Blume H. A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability. in Pinho LM, Karl W, Brinkschulte U, Cohen A, Hrsg., Architecture of Computing Systems - ARCS 2015: Proceedings. Springer Verlag. 2015. S. 161-172. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-319-16086-3_13
Bartels, Christopher ; Zhang, Chao ; Payá-Vayá, Guillermo et al. / A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability. Architecture of Computing Systems - ARCS 2015: Proceedings. Hrsg. / Luís Miguel Pinho ; Wolfgang Karl ; Uwe Brinkschulte ; Albert Cohen. Springer Verlag, 2015. S. 161-172 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).
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@inproceedings{453806a75f294818bdc2ed180af0b667,
title = "A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability",
keywords = "DSP-slices, FPGA, LUTs, Routing, Temperature sensors",
author = "Christopher Bartels and Chao Zhang and Guillermo Pay{\'a}-Vay{\'a} and Holger Blume",
year = "2015",
month = mar,
day = "11",
doi = "10.1007/978-3-319-16086-3_13",
language = "English",
isbn = "978-3-319-16085-6",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "161--172",
editor = "Pinho, {Lu{\'i}s Miguel} and Wolfgang Karl and Uwe Brinkschulte and Albert Cohen",
booktitle = "Architecture of Computing Systems - ARCS 2015",
address = "Germany",
note = "International Conference on Architecture of Computing Systems, ARCS 2015 ; Conference date: 24-03-2015 Through 27-03-2015",

}

Download

TY - GEN

T1 - A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability

AU - Bartels, Christopher

AU - Zhang, Chao

AU - Payá-Vayá, Guillermo

AU - Blume, Holger

N1 - Conference code: 28

PY - 2015/3/11

Y1 - 2015/3/11

KW - DSP-slices

KW - FPGA

KW - LUTs

KW - Routing

KW - Temperature sensors

UR - http://www.scopus.com/inward/record.url?scp=84930441454&partnerID=8YFLogxK

U2 - 10.1007/978-3-319-16086-3_13

DO - 10.1007/978-3-319-16086-3_13

M3 - Conference contribution

AN - SCOPUS:84930441454

SN - 978-3-319-16085-6

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 161

EP - 172

BT - Architecture of Computing Systems - ARCS 2015

A2 - Pinho, Luís Miguel

A2 - Karl, Wolfgang

A2 - Brinkschulte, Uwe

A2 - Cohen, Albert

PB - Springer Verlag

T2 - International Conference on Architecture of Computing Systems, ARCS 2015

Y2 - 24 March 2015 through 27 March 2015

ER -

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