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A scalable packet sorting circuit for high-speed WFQ packet scheduling

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Autorschaft

  • K. McLaughlin
  • S. Sezer
  • H. Blume
  • X. Yang

Externe Organisationen

  • Rheinisch-Westfälische Technische Hochschule Aachen (RWTH)
  • Queen's University Belfast
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    • Citation Indexes: 3
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    • Readers: 1
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Details

OriginalspracheEnglisch
Titel des Sammelwerks2006 IEEE International SOC Conference
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers Inc.
Seiten271-274
Seitenumfang4
ISBN (Print)0780397819
PublikationsstatusVeröffentlicht - 15 Jan. 2007
Extern publiziertJa
Veranstaltung2006 IEEE International Systems-on-Chip Conference, SOC - Austin, TX, USA / Vereinigte Staaten
Dauer: 24 Sept. 2006 → 27 Sept. 2006

Abstract

A novel implementation of a tag sorting circuit for a Weighted Fair Queuing (WFQ) enabled IP packet scheduler is presented. The design consists of a search tree, matching circuitry and a custom memory layout. The implementation uses 130nm silicon technology and supports Quality of Service on networks at line speeds of 40Gbps.

ASJC Scopus Sachgebiete

Zitieren

A scalable packet sorting circuit for high-speed WFQ packet scheduling. / McLaughlin, K.; Sezer, S.; Blume, H. et al.
2006 IEEE International SOC Conference. Institute of Electrical and Electronics Engineers Inc., 2007. S. 271-274.

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

McLaughlin, K, Sezer, S, Blume, H, Yang, X, Kupzog, F & Noll, T 2007, A scalable packet sorting circuit for high-speed WFQ packet scheduling. in 2006 IEEE International SOC Conference. Institute of Electrical and Electronics Engineers Inc., S. 271-274, 2006 IEEE International Systems-on-Chip Conference, SOC, Austin, TX, USA / Vereinigte Staaten, 24 Sept. 2006. https://doi.org/10.1109/SOCC.2006.283896
McLaughlin, K., Sezer, S., Blume, H., Yang, X., Kupzog, F., & Noll, T. (2007). A scalable packet sorting circuit for high-speed WFQ packet scheduling. In 2006 IEEE International SOC Conference (S. 271-274). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SOCC.2006.283896
McLaughlin K, Sezer S, Blume H, Yang X, Kupzog F, Noll T. A scalable packet sorting circuit for high-speed WFQ packet scheduling. in 2006 IEEE International SOC Conference. Institute of Electrical and Electronics Engineers Inc. 2007. S. 271-274 doi: 10.1109/SOCC.2006.283896
McLaughlin, K. ; Sezer, S. ; Blume, H. et al. / A scalable packet sorting circuit for high-speed WFQ packet scheduling. 2006 IEEE International SOC Conference. Institute of Electrical and Electronics Engineers Inc., 2007. S. 271-274
Download
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