Details
| Originalsprache | Englisch |
|---|---|
| Aufsatznummer | 28877 |
| Fachzeitschrift | Scientific reports |
| Jahrgang | 6 |
| Publikationsstatus | Veröffentlicht - 1 Juli 2016 |
| Extern publiziert | Ja |
Abstract
Tremendous enhancement of light-matter interaction in plasmonic-dielectric hybrid devices allows for non-linearities at the level of single emitters and few photons, such as single photon transistors. However, constructing integrated components for such devices is technologically extremely challenging. We tackle this task by lithographically fabricating an on-chip plasmonic waveguide-structure connected to far-field in-and out-coupling ports via low-loss dielectric waveguides. We precisely describe our lithographic approach and characterize the fabricated integrated chip. We find excellent agreement with rigorous numerical simulations. Based on these findings we perform a numerical optimization and calculate concrete numbers for a plasmonic single-photon transistor.
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in: Scientific reports, Jahrgang 6, 28877, 01.07.2016.
Publikation: Beitrag in Fachzeitschrift › Artikel › Forschung › Peer-Review
}
TY - JOUR
T1 - A realistic fabrication and design concept for quantum gates based on single emitters integrated in plasmonic-dielectric waveguide structures
AU - Kewes, Günter
AU - Schoengen, Max
AU - Neitzke, Oliver
AU - Lombardi, Pietro
AU - Schönfeld, Rolf Simon
AU - Mazzamuto, Giacomo
AU - Schell, Andreas W.
AU - Probst, Jürgen
AU - Wolters, Janik
AU - Löchel, Bernd
AU - Toninelli, Costanza
AU - Benson, Oliver
PY - 2016/7/1
Y1 - 2016/7/1
N2 - Tremendous enhancement of light-matter interaction in plasmonic-dielectric hybrid devices allows for non-linearities at the level of single emitters and few photons, such as single photon transistors. However, constructing integrated components for such devices is technologically extremely challenging. We tackle this task by lithographically fabricating an on-chip plasmonic waveguide-structure connected to far-field in-and out-coupling ports via low-loss dielectric waveguides. We precisely describe our lithographic approach and characterize the fabricated integrated chip. We find excellent agreement with rigorous numerical simulations. Based on these findings we perform a numerical optimization and calculate concrete numbers for a plasmonic single-photon transistor.
AB - Tremendous enhancement of light-matter interaction in plasmonic-dielectric hybrid devices allows for non-linearities at the level of single emitters and few photons, such as single photon transistors. However, constructing integrated components for such devices is technologically extremely challenging. We tackle this task by lithographically fabricating an on-chip plasmonic waveguide-structure connected to far-field in-and out-coupling ports via low-loss dielectric waveguides. We precisely describe our lithographic approach and characterize the fabricated integrated chip. We find excellent agreement with rigorous numerical simulations. Based on these findings we perform a numerical optimization and calculate concrete numbers for a plasmonic single-photon transistor.
UR - http://www.scopus.com/inward/record.url?scp=84976889280&partnerID=8YFLogxK
U2 - 10.1038/srep28877
DO - 10.1038/srep28877
M3 - Article
AN - SCOPUS:84976889280
VL - 6
JO - Scientific reports
JF - Scientific reports
SN - 2045-2322
M1 - 28877
ER -