A Power Estimation Model for an FPGA-Based Softcore Processor

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Autorschaft

  • Peter Zipf
  • Heiko Hinkelmann
  • Lei Deng
  • Manfred Glesner
  • Holger Blume
  • Tobias G. Noll

Externe Organisationen

  • Technische Universität Darmstadt
  • Rheinisch-Westfälische Technische Hochschule Aachen (RWTH)
Forschungs-netzwerk anzeigen

Details

OriginalspracheEnglisch
Titel des Sammelwerks2007 International Conference on Field Programmable Logic and Applications
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers Inc.
Seiten171-176
Seitenumfang6
ISBN (Print)978-1-4244-1059-0
PublikationsstatusVeröffentlicht - 12 Nov. 2007
Extern publiziertJa
Veranstaltung2007 International Conference on Field Programmable Logic and Applications, FPL - Amsterdam, Niederlande
Dauer: 27 Aug. 200729 Aug. 2007

Abstract

We describe the application of a hybrid functional level power analysis (FLPA) and instruction level power analysis (ILPA) approach to a processor model implemented on an FPGA. This technique enables the estimation of the task specific power consumption of the modeled processor, in our case a LEON2, very early during a system design flow, based on the software which will run on it. The FLPA/ILPA model used during our work as well as the test scenarios and the measured results are described. Later, the function block separation and the power consumption modeling are discussed. Finally, the model is validated by benchmarking. The obtained model is promising in the sense that a) its estimations are close (4 % on average) to the measured data, and b) the model structure is similar to that of hardcore processors which is not a trivial result.

ASJC Scopus Sachgebiete

Zitieren

A Power Estimation Model for an FPGA-Based Softcore Processor. / Zipf, Peter; Hinkelmann, Heiko; Deng, Lei et al.
2007 International Conference on Field Programmable Logic and Applications. Institute of Electrical and Electronics Engineers Inc., 2007. S. 171-176 4380643.

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Zipf, P, Hinkelmann, H, Deng, L, Glesner, M, Blume, H & Noll, TG 2007, A Power Estimation Model for an FPGA-Based Softcore Processor. in 2007 International Conference on Field Programmable Logic and Applications., 4380643, Institute of Electrical and Electronics Engineers Inc., S. 171-176, 2007 International Conference on Field Programmable Logic and Applications, FPL, Amsterdam, Niederlande, 27 Aug. 2007. https://doi.org/10.1109/FPL.2007.4380643
Zipf, P., Hinkelmann, H., Deng, L., Glesner, M., Blume, H., & Noll, T. G. (2007). A Power Estimation Model for an FPGA-Based Softcore Processor. In 2007 International Conference on Field Programmable Logic and Applications (S. 171-176). Artikel 4380643 Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FPL.2007.4380643
Zipf P, Hinkelmann H, Deng L, Glesner M, Blume H, Noll TG. A Power Estimation Model for an FPGA-Based Softcore Processor. in 2007 International Conference on Field Programmable Logic and Applications. Institute of Electrical and Electronics Engineers Inc. 2007. S. 171-176. 4380643 doi: 10.1109/FPL.2007.4380643
Zipf, Peter ; Hinkelmann, Heiko ; Deng, Lei et al. / A Power Estimation Model for an FPGA-Based Softcore Processor. 2007 International Conference on Field Programmable Logic and Applications. Institute of Electrical and Electronics Engineers Inc., 2007. S. 171-176
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AU - Zipf, Peter

AU - Hinkelmann, Heiko

AU - Deng, Lei

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