A flexible, fully configurable architecture for MPEG-2 video encoding

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Autoren

  • J. Jachalsky
  • M. Wahle
  • P. Pirsch
  • W. Gehrke

Externe Organisationen

  • Philips HealthTech
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Details

OriginalspracheEnglisch
Titel des SammelwerksICECS 2002
Untertitel9th IEEE International Conference on Electronics, Circuits and Systems
Seiten1063-1066
Seitenumfang4
PublikationsstatusVeröffentlicht - 2002
Veranstaltung9th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2002 - Dubrovnik, Kroatien
Dauer: 15 Sept. 200218 Sept. 2002

Publikationsreihe

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Band3

Abstract

This paper introduces a video encoder architecture for real-time MPEG-2 Main Profile at Main Level (MP@ML) encoding. It combines a programmable CPU for controlling with a fully configurable, but dedicated compression core. Therefore the encoder architecture offers a great processing flexibility at a high computational performance. One focal point of the paper is the motion estimation unit of the compression core that employs a highly efficient recursive block-matching motion estimation algorithm. To guarantee full memory bandwidth utilization the number of candidate blocks used for the block-matching process can be varied. The compression core was implemented in a 0.18pm 5 ML CMOS technology to run at 54 MHz. The architecture was thoroughly verified using hardware/software co-simulation.

ASJC Scopus Sachgebiete

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A flexible, fully configurable architecture for MPEG-2 video encoding. / Jachalsky, J.; Wahle, M.; Pirsch, P. et al.
ICECS 2002 : 9th IEEE International Conference on Electronics, Circuits and Systems. 2002. S. 1063-1066 1046434 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Band 3).

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Jachalsky, J, Wahle, M, Pirsch, P & Gehrke, W 2002, A flexible, fully configurable architecture for MPEG-2 video encoding. in ICECS 2002 : 9th IEEE International Conference on Electronics, Circuits and Systems., 1046434, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, Bd. 3, S. 1063-1066, 9th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2002, Dubrovnik, Kroatien, 15 Sept. 2002. https://doi.org/10.1109/ICECS.2002.1046434
Jachalsky, J., Wahle, M., Pirsch, P., & Gehrke, W. (2002). A flexible, fully configurable architecture for MPEG-2 video encoding. In ICECS 2002 : 9th IEEE International Conference on Electronics, Circuits and Systems (S. 1063-1066). Artikel 1046434 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Band 3). https://doi.org/10.1109/ICECS.2002.1046434
Jachalsky J, Wahle M, Pirsch P, Gehrke W. A flexible, fully configurable architecture for MPEG-2 video encoding. in ICECS 2002 : 9th IEEE International Conference on Electronics, Circuits and Systems. 2002. S. 1063-1066. 1046434. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). doi: 10.1109/ICECS.2002.1046434
Jachalsky, J. ; Wahle, M. ; Pirsch, P. et al. / A flexible, fully configurable architecture for MPEG-2 video encoding. ICECS 2002 : 9th IEEE International Conference on Electronics, Circuits and Systems. 2002. S. 1063-1066 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).
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