TY - JOUR

T1 - A Cryogenic 12 GHz Frequency Doubler with Temperature Compensation for Trapped-Ion Quantum Computer

AU - Toth, Peter

AU - Meyer, Alexander

AU - Halama, Sebastian

AU - Ishikuro, Hiroki

AU - Issakov, Vadim

N1 - Funding Information: . This work was supported by the German BMBF funded Project QuMIC under Grant 13N15932. This brief was recommended by Associate Editor E. Yao.

PY - 2023/6/28

Y1 - 2023/6/28

N2 - This brief presents a frequency doubler (FD) for a microwave-control system intended for an ^171 Yb^+ ion-trap-based quantum computer. The circuit is optimized for frequency multiplication from 11GHz to 13 GHz with a ≥29 dBc fundamental- and third harmonic rejection over the entire frequency range and peak HRR1/HRR3 of 37 dBc/ 39 dBc. This enables the microwave frequency generation to drive the hyperfine transitions in the electronic ground state of an ^171 Yb^+ ion at 12.6 GHz. Cryogenic measurements of the FD down to 4.5 K enable circuit functionality verification for the intended low-temperature operation. Additionally, insights into the cryogenic temperature effects of the employed BiCMOS technology are obtained and used to derive a biasing control methodology for constant performance in the temperature range of 300K to 4.5K. The proposed circuit is silicon-proven and fabricated in a 0.13~ μ m SiGe BiCMOS process, consuming a core area of only 0.034 mm2.

AB - This brief presents a frequency doubler (FD) for a microwave-control system intended for an ^171 Yb^+ ion-trap-based quantum computer. The circuit is optimized for frequency multiplication from 11GHz to 13 GHz with a ≥29 dBc fundamental- and third harmonic rejection over the entire frequency range and peak HRR1/HRR3 of 37 dBc/ 39 dBc. This enables the microwave frequency generation to drive the hyperfine transitions in the electronic ground state of an ^171 Yb^+ ion at 12.6 GHz. Cryogenic measurements of the FD down to 4.5 K enable circuit functionality verification for the intended low-temperature operation. Additionally, insights into the cryogenic temperature effects of the employed BiCMOS technology are obtained and used to derive a biasing control methodology for constant performance in the temperature range of 300K to 4.5K. The proposed circuit is silicon-proven and fabricated in a 0.13~ μ m SiGe BiCMOS process, consuming a core area of only 0.034 mm2.

KW - BiCMOS

KW - Freq. doubler

KW - trapped Ion QC

UR - http://www.scopus.com/inward/record.url?scp=85163487660&partnerID=8YFLogxK

U2 - 10.1109/TCSII.2023.3290260

DO - 10.1109/TCSII.2023.3290260

M3 - Article

AN - SCOPUS:85163487660

VL - 70

SP - 3877

EP - 3881

JO - IEEE Transactions on Circuits and Systems II: Express Briefs

JF - IEEE Transactions on Circuits and Systems II: Express Briefs

SN - 1549-7747

IS - 10

ER -