Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | 2016 IEEE Applied Power Electronics Conference and Exposition, APEC 2016 |
| Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers Inc. |
| Seiten | 106-110 |
| Seitenumfang | 5 |
| ISBN (elektronisch) | 9781467383936 |
| Publikationsstatus | Veröffentlicht - 10 Mai 2016 |
| Extern publiziert | Ja |
| Veranstaltung | 31st Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2016 - Long Beach, USA / Vereinigte Staaten Dauer: 20 März 2016 → 24 März 2016 |
Publikationsreihe
| Name | Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC |
|---|---|
| Band | 2016-May |
Abstract
An integrated synchronous buck converter with a high resolution dead time control for input voltages up to 48V and 10MHz switching frequency is presented. The benefit of an enhanced dead time control at light loads to enable zero voltage switching at both the high-side and low-side switch at low output load is studied. This way, compact multi-MHz DCDC converters can be implemented at high efficiency over a wide load current range. The concept also eliminates body diode forward conduction losses and minimizes reverse recovery losses. A dead time resolution of 125 ps is realized by an 8-bit differential delay chain. A further efficiency enhancement by soft switching at the high-side switch at light load is achieved with a voltage boost of the switching node by dead time control in forced continuous conduction mode. The monolithic converter is implemented in an 180nm high-voltage BiCMOS technology. At VIN = 48V, VOUT = 5V, 50mA load, 10MHz switching frequency and 500 nH output inductance, the efficiency is measured to be increased by 14.4% compared to a conventional predictive dead time control. A peak efficiency of 80.9% is achieved at 12V input.
ASJC Scopus Sachgebiete
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
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2016 IEEE Applied Power Electronics Conference and Exposition, APEC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. S. 106-110 7467859 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Band 2016-May).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - A 10 MHz, 48-to-5V synchronous converter with dead time enabled 125 ps resolution zero-voltage switching
AU - Barner, Alexander
AU - Wittmann, Juergen
AU - Rosahl, Thoralf
AU - Wicht, Bernhard
N1 - Publisher Copyright: © 2016 IEEE.
PY - 2016/5/10
Y1 - 2016/5/10
N2 - An integrated synchronous buck converter with a high resolution dead time control for input voltages up to 48V and 10MHz switching frequency is presented. The benefit of an enhanced dead time control at light loads to enable zero voltage switching at both the high-side and low-side switch at low output load is studied. This way, compact multi-MHz DCDC converters can be implemented at high efficiency over a wide load current range. The concept also eliminates body diode forward conduction losses and minimizes reverse recovery losses. A dead time resolution of 125 ps is realized by an 8-bit differential delay chain. A further efficiency enhancement by soft switching at the high-side switch at light load is achieved with a voltage boost of the switching node by dead time control in forced continuous conduction mode. The monolithic converter is implemented in an 180nm high-voltage BiCMOS technology. At VIN = 48V, VOUT = 5V, 50mA load, 10MHz switching frequency and 500 nH output inductance, the efficiency is measured to be increased by 14.4% compared to a conventional predictive dead time control. A peak efficiency of 80.9% is achieved at 12V input.
AB - An integrated synchronous buck converter with a high resolution dead time control for input voltages up to 48V and 10MHz switching frequency is presented. The benefit of an enhanced dead time control at light loads to enable zero voltage switching at both the high-side and low-side switch at low output load is studied. This way, compact multi-MHz DCDC converters can be implemented at high efficiency over a wide load current range. The concept also eliminates body diode forward conduction losses and minimizes reverse recovery losses. A dead time resolution of 125 ps is realized by an 8-bit differential delay chain. A further efficiency enhancement by soft switching at the high-side switch at light load is achieved with a voltage boost of the switching node by dead time control in forced continuous conduction mode. The monolithic converter is implemented in an 180nm high-voltage BiCMOS technology. At VIN = 48V, VOUT = 5V, 50mA load, 10MHz switching frequency and 500 nH output inductance, the efficiency is measured to be increased by 14.4% compared to a conventional predictive dead time control. A peak efficiency of 80.9% is achieved at 12V input.
UR - http://www.scopus.com/inward/record.url?scp=84973631204&partnerID=8YFLogxK
U2 - 10.1109/apec.2016.7467859
DO - 10.1109/apec.2016.7467859
M3 - Conference contribution
AN - SCOPUS:84973631204
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 106
EP - 110
BT - 2016 IEEE Applied Power Electronics Conference and Exposition, APEC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 31st Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2016
Y2 - 20 March 2016 through 24 March 2016
ER -